1. Field of the Invention
The present invention relates to a memory system, and for example relates to a memory system using a NAND flash memory.
2. Related Art
Semiconductor memories are used in main memories of large computers, personal computers, home electric appliances, portable telephones or the like. Flash EEPROM nonvolatile memories (hereinafter, “NAND flash memories”) are applied to various memory mediums (SD cards, MMCs (Multi Media Cards), MS (Magnetic Stripe) cards, CFs (Compact Flash) cards, USB memories, SSDs (Solid-State-Disks) or the like. The NAND flash memories are used as information memory mediums of images, moving pictures, sound, games or the like, in digital cameras, digital video cameras, music devices of MP3's, mobile devices, digital televisions or the like. Further, the NAND flash memories are also used as memory mediums alternative to HDDs of personal computers.
The NAND flash memories perform data writing/reading operations in a page unit consisting of plural memory cells, and perform a data erasing operation in a block unit consisting of plural pages. In the verification of the data writing/reading operations, blocks determined as defective blocks are not accessed in the normal operation, by regarding these blocks as bad blocks. Bad blocks are permitted to a certain level in one memory chip. The permissible number of bad blocks can be optionally set.
In a NAND flash memory system including plural memory chips, the plural memory chips are operated in parallel, to achieve high-speed reading/high-speed writing of data. When plural memory chips are operated in parallel, blocks of which reading/writing are valid must be valid together in plural memory chips as well. Therefore, in the plural memory chips to be operated in parallel, the number of valid blocks, that is, a memory capacity, is limited by a memory chip having a largest number of bad blocks among the plural memory chips. If one chip has a large number of bad blocks in plural memory chips operated in parallel, a memory capacity is determined by this chip. For example, when the number of bad blocks in each of four chips operated in parallel is one, fifty, two, and three, respectively, the total number of valid blocks of the four chips operated in parallel is limited by the memory chip having the fifty bad blocks. In this case, unused valid blocks in other three chips become wasteful.